Difference between revisions of "Thoughts on PWM"

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(New page: So, we turn off outputting automatically, set up interrupts on mid and top. Set the period to something reasonable, and the resolution to something largish. There should be a table in RA...)
 
 
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There should be a table in RAM, of duty cycles for each chosen output pin.  Should be single (double) byte entries for each pin specifying the fraction of 255 slots that should be ON for that pin.  Each entry should contain:
There should be a table in RAM, of duty cycles for each chosen output pin.  Should be single (double) byte entries for each pin specifying the fraction of 255 slots that should be ON for that pin.  Each entry should contain:
(byte):  next entry in sorted sequence (in entry numbers, so *4 is the offset from start. FF indicates end of list)
*(byte):  next entry in sorted sequence (in entry numbers, so *4 is the offset from start. FF indicates end of list)
(byte):  output port for this entry (upper nibble determines which set of 8 pins (PAx=0,PBx=1,PCx=2,PDx=3,PEx=4,PFx=5...), lower nibble determines which pin of the 8 to use)
*(byte):  output port for this entry (upper nibble determines which set of 8 pins (PAx=0,PBx=1,PCx=2,PDx=3,PEx=4,PFx=5...), lower nibble determines which pin of the 8 to use)
(word):  duty cycle specification (might just be one byte, with a one byte pad)
*(word):  duty cycle specification (might just be one byte, with a one byte pad)


Before the table should be a dummy entry, stating which entry to start with, how many entries there are, and what the resolution is (maybe?)
Before the table should be a dummy entry, stating which entry to start with, how many entries there are, and what the resolution is (maybe?)

Latest revision as of 09:23, 16 October 2008

So, we turn off outputting automatically, set up interrupts on mid and top. Set the period to something reasonable, and the resolution to something largish.

There should be a table in RAM, of duty cycles for each chosen output pin. Should be single (double) byte entries for each pin specifying the fraction of 255 slots that should be ON for that pin. Each entry should contain:

  • (byte): next entry in sorted sequence (in entry numbers, so *4 is the offset from start. FF indicates end of list)
  • (byte): output port for this entry (upper nibble determines which set of 8 pins (PAx=0,PBx=1,PCx=2,PDx=3,PEx=4,PFx=5...), lower nibble determines which pin of the 8 to use)
  • (word): duty cycle specification (might just be one byte, with a one byte pad)

Before the table should be a dummy entry, stating which entry to start with, how many entries there are, and what the resolution is (maybe?)

When the top interrupt fires, we turn on outputs to all pins, then navigate our sorted table by jumping through the next thingies to find the first pin that will need to be shut off. We place that pin's duty cycle value in mid, and return.

When mid fires, we work through our sorted table, turning off all pins until we find a value that exceeds our current mid. Then we change mid to that new value, and return.

When adding a new entry to the table, turn off interrupts (or at least the top and mid ones), update the total number of entries, place a new entry at the end of the table, then figure out where in the sequence it belongs, and reshuffle next ptrs to include the new entry. Then turn back on interrupts. We may have missed one of them, but it should fire at that point, I think?

When removing an entry, turn off interrupts (or at least top and mid), find the old entry for this port, and copy the last entry in the table to that slot. Have to reshuffle next ptrs for the one that used to point at the deleted entry, and the one that used to point at the last entry. Then we update the total number of entries, turn off the output to the port, and turn back on interrupts.

Note that to change the duty cycle of a port, it has to be removed and readded. No need to turn off ints in between the two operations, I don't think.